Here is a state table for a 4-bit counter:
cl o3 o2 o1 o0 | o3' o2' o1' o0' -------------------------------- 0 0 0 0 0 | 0 0 0 1 0 0 0 0 1 | 0 0 1 0 0 0 0 1 0 | 0 0 1 1 0 0 0 1 1 | 0 1 0 0 0 0 1 0 0 | 0 1 0 1 0 0 1 0 1 | 0 1 1 0 0 0 1 1 0 | 0 1 1 1 0 0 1 1 1 | 1 0 0 0 0 1 0 0 0 | 1 0 0 1 0 1 0 0 1 | 1 0 1 0 0 1 0 1 0 | 1 0 1 1 0 1 0 1 1 | 1 1 0 0 0 1 1 0 0 | 1 1 0 1 0 1 1 0 1 | 1 1 1 0 0 1 1 1 0 | 1 1 1 1 0 1 1 1 1 | 0 0 0 0 1 0 0 0 0 | 0 0 0 0 1 0 0 0 1 | 0 0 0 0 1 0 0 1 0 | 0 0 0 0 1 0 0 1 1 | 0 0 0 0 1 0 1 0 0 | 0 0 0 0 1 0 1 0 1 | 0 0 0 0 1 0 1 1 0 | 0 0 0 0 1 0 1 1 1 | 0 0 0 0 1 1 0 0 0 | 0 0 0 0 1 1 0 0 1 | 0 0 0 0 1 1 0 1 0 | 0 0 0 0 1 1 0 1 1 | 0 0 0 0 1 1 1 0 0 | 0 0 0 0 1 1 1 0 1 | 0 0 0 0 1 1 1 1 0 | 0 0 0 0 1 1 1 1 1 | 0 0 0 0As you can see, our conter behaves like an ordinary one when the cl signal is 0, and always goes to 0 when the cl signal is 1.